1. Field of the Invention
The present invention relates to packet transmission devices, and more particularly, to a packet transmission device for switching packets for transmission.
2. Description of the Related Art
As information communication networks become multimedia-oriented, growing importance has come to be placed on routers which interconnect different networks to allow communication between nodes. Also, various types of packets travel over networks and thus routers for switching such packets are required to have higher performance as well as higher functionality.
The performance of a router is expressed as the number of packets that can be processed per unit time, and the greater the number of processed packets, the higher performance the router has. Also, a router capable of processing a wider range of packet types is regarded as having higher functionality (packet types include, for example, L2 (Layer 2) packet, IPv4 packet, IPv6 packet, etc.).
FIG. 10 shows the configuration of a conventional router. The router 60 comprises a receiving interface (I/F) 61, a memory 62, a protocol processor 63, an updater 64, and a transmitting interface (I/F) 65. The receiving interface 61 takes care of interfacing with incoming packets, and the memory 62 stores the received packets.
The protocol processor 63 reads out and analyzes the header (header data) of a packet stored in the memory 62, and determines a new destination address to which the packet is to be forwarded from the router 60.
The updater 64 reads out a packet from the memory 62 and updates the old destination address of the packet to the new one determined by the protocol processor 63. The transmitting interface 65 takes care of interfacing with outgoing packets whose destination addresses have been updated. In this manner, the router 60 determines new destination addresses for received packets and updates the old destination addresses to the new ones, thereby switching the packets to be forwarded to their respective destinations.
As packet processing techniques for conventional routers, there has been proposed a concurrent processing technique whereby the retrieval of a destination address of a packet header is performed concurrently with a packet transmission process (e.g., Unexamined Japanese Patent Publication No. H11-261649 (paragraph nos. [0007] to [0009], FIG. 1)).
In the aforementioned router 60, the protocol processor 63 reads out the header data of a packet from the memory 62 and then analyzes the header data to determine a new destination address. In this case, a fixed length of data is read from the memory 62 to retrieve the header data.
FIG. 11 illustrates a problem with the conventional router 60. Packets p1 to p3 are stored in the memory 62. The packet p1 has a-byte header data h1, the packet p2 has b-byte header data h2, and the packet p3 has c-byte header data h3. The header data lengths are in the relationship of c<b<a.
Let it be assumed that the router 60 can process these three types of packets p1 to p3. In the conventional router, a fixed length of data is read out to retrieve the header data, and therefore, the protocol processor 63 must always read out a maximum length of a bytes from the memory 62 when analyzing the destination.
Namely, when the header data is read from the memory 62, data corresponding to the fixed length of a bytes is always read out irrespective of the types of packets p1 to p3 having different header lengths. With respect to the packets p2 and p3, therefore, a portion of the payload is also read out and is discarded by the protocol processor 63 as data unnecessary for the destination analysis.
Thus, in the conventional router, a fixed length of data is read out to retrieve the header data. Consequently, with regard to packets with headers shorter than the fixed length, up to an unnecessary data area including the payload is accessed, which lowers the processing performance and entails inefficiency.
To avoid lowering in the processing performance, a fixed length may be set with respect to each of different header data lengths of packets. With this method, however, there arises constraints on the types of routers that can be used, depending on packet types, and this hinders the router functionality from being enhanced such that a single router can process a plurality of different types of packets.
According to the aforementioned conventional technique (Unexamined Japanese Patent Publication No. H11-261649), a packet memory for storing received packets in their entirety and a header memory for storing only the header data of the packets are provided separately from each other, and during the destination analysis of the header data read from the header memory, a different packet is read from the packet memory for transmission. However, since the memory for storing only the header data needs to be separately provided, the scale of circuitry as well as the power consumption increase.